Module 1: System View

Wi-Fi 802.11 Overview and Architecture

Learning objectives

Explain the core mental model behind Wi-Fi 802.11 Overview and Architecture
Apply Wi-Fi 802.11 Overview and Architecture within System View
Identify important boundaries, trade-offs, and failure modes
Produce concrete evidence from the practice exercise

Related: WIFI MAC Architecture | WIFI PHY Architecture | WIFI MAC PHY Interface | WIFI 80211 Generations | WIFI Index

What 802.11 Is

IEEE 802.11 is the wireless LAN protocol family commonly called Wi-Fi. From a hardware point of view, it is a stack of timing-sensitive digital and RF functions that allow many stations to share an unreliable radio channel without a central wired clock.

Unlike PCIe or AXI, Wi-Fi is not a clean point-to-point wire protocol. Every transmitter shares the same medium:

Another station may already be transmitting.
A receiver may hear interference the transmitter cannot hear.
Channel quality changes with movement, reflections, and noise.
Regulatory limits constrain channel, bandwidth, power, and spectral shape.

That is why Wi-Fi hardware is full of sensing, timing, retries, rate adaptation, calibration, and filtering logic.

Main Roles

Role	Meaning	Hardware relevance
STA	Station; any Wi-Fi client or AP radio	Implements MAC/PHY, association state, security, queues
AP	Access Point	Transmits beacons, buffers power-save traffic, bridges distribution system traffic
BSS	Basic Service Set	One AP plus associated STAs, or an independent ad hoc group
ESS	Extended Service Set	Multiple BSSs connected by a distribution system

The hardware usually does not understand all high-level roaming or IP behavior, but it must support the frame formats, timing, encryption, filtering, and power-save mechanisms that make those behaviors possible.

The MAC/PHY Split

The MAC decides:

which frame to send
when the medium is free
which queue wins arbitration
whether a received frame is addressed to this device
whether a frame needs ACK, Block Ack, retry, decryption, or reorder

The PHY decides:

whether energy or a valid preamble exists on the channel
how to synchronize to the packet
how to demodulate symbols into bits
how to encode bits into a legal transmit waveform
how to measure RSSI, EVM, CFO, and channel state

The boundary is not just payload bits. The MAC and PHY exchange rich metadata: modulation, coding, number of spatial streams, channel width, preamble type, packet duration, RSSI, error flags, and clear-channel state.

Typical Wi-Fi Chip Datapath

Host / DMA
   │
   ▼
TX queues / descriptors
   │
   ▼
MAC scheduler ── backoff / NAV / EDCA / retry
   │
   ▼
Frame builder ── encryption ── FCS ── aggregation
   │
   ▼
PHY TX ── coding ── interleave ── map ── IFFT ── DAC/RF
   │                                             │
   └──────────────────── air medium ─────────────┘
                                                 │
RF/ADC ── packet detect ── sync ── FFT ── equalize ── decode
   │
   ▼
RX MAC parser ── FCS/security/filter/reorder
   │
   ▼
DMA / firmware / host

The exact partition varies. Low-cost designs push more policy into firmware; high-throughput designs move more scheduling, aggregation, encryption, and response generation into hardware.

Hardware Fast Path vs Slow Path

Fast Path

Fast-path logic handles operations that must complete at packet rate or within strict inter-frame timing:

preamble detection and PHY acquisition
ACK / Block Ack response after SIFS
FCS generation/checking
encryption/decryption datapath
duplicate detection
queue selection and backoff countdown
RX filtering for address/BSSID/frame type
A-MPDU delimiter parsing and BA bitmap generation

Slow Path

Slow-path firmware or host logic handles operations with looser timing:

association/authentication policy
scanning decisions
roaming
long-term rate control policy
regulatory configuration
statistics collection
key installation

The key design mistake is putting a SIFS-critical decision in firmware. If firmware cannot respond before the SIFS deadline, the peer will treat the frame as failed.

Why Wi-Fi Hardware Is Hard

Wi-Fi combines three difficult domains:

Protocol complexity: many frame types, QoS, aggregation, power save, security, coexistence.
Real-time deadlines: SIFS responses, backoff slot timing, PHY turnarounds, beacon timing.
Analog uncertainty: fading, multipath, interference, oscillator offsets, calibration drift.

Good Wi-Fi hardware is therefore built around observability. Every timing counter, PHY status, retry reason, discard reason, and queue decision should be debuggable.

WIFI MAC Architecture — Hardware MAC block decomposition
WIFI PHY Architecture — PHY datapath and control
WIFI MAC PHY Interface — MAC/PHY contract
WIFI Verification and Debug — How to verify the whole design
WIFI Index — Full Wi-Fi index

Practice lab

Draw or encode one legal transaction trace for Wi-Fi 802.11 Overview and Architecture. Annotate fields, channel events, ordering points, and completion conditions; then construct one illegal or adversarial trace and define the checker that should catch it.

Review questions

What problem does Wi-Fi 802.11 Overview and Architecture solve, and what assumptions does it rely on?
Which boundary or failure case is easiest to miss, and how would you expose it?
What alternative design would you consider, and what trade-off would change the decision?
What artifact, trace, test, or metric proves that your implementation is correct?

Completion evidence

A working artifact, annotated trace, or reproducible experiment
At least one normal case and one deliberately failing or boundary case
A concise explanation of the design choice and its trade-offs
Saved output showing how correctness was evaluated